The proposed new converter was design with two inductors (L₁ & L₂), four diodes (D₁, D₂, D₃& D₄), two capacitors (C₁& C₂), two power switches (Q1 and Q2), and a resistor (R_L). The actual sizes of the electronics components for the designed of the DC-DC boost converter based on simulation are shortlisted in Table 1.

The proposed circuit diagram of the DC-DC boost converter is integrated with voltage multiplier circuits into a conventional interleaved boost converter. The converter which consists of a power input source, 2 Inductors, and 2 signal generators, 4 diodes, 2 capacitors and the load resistance was design using Multism 14.2. Figure 1 presents the circuit diagram of the proposed converter. Figure 2

The operation principle of the proposed topology under continuous conduction mode: The steady state operation of the proposed converter (CCM) consists of modes of operation.

The switches Q1 and Q2 are ON and the diodes D1, D2, D3, and D4 are reverse biased. The diodes D1 and D2 are reverse biased due to the voltage of the capacitor C1. The diodes D3 and D4 are reverse biased due to the voltage difference between the capacitor C3 and C1.Figure 3

The mode 2 switch Q1 is ON and the switch Q2 is turned OFF. The diodes D1 and D3,maintain a reverse bias state as shown in the figure below. Energy stored in the inductor L1 rises from minimum to maximum. The primary side of the coupled inductr transfers energy to capacitors C1.Figure 4

In mode 3 the switch Q1 is OFF and the switch Q2 is turned OFF. The diodes D2 and D4,maintain a reverse bias state as shown in the figure below. Energy stored in the inductor L2 rises from minimum to maximum. The primary side of the coupled inductor transfers energy to capacitors C1.Figure 5

However, when the switches are turned OFF in mode 4, the diodes become forward biased and they stars conducting. Energy stored in the inductor L1 and L2 is already transferred to capacitor C1 in the previous modes and in this mode energy along with source is transferred to capacitor C2 and load. Inductor currents fall from maximum value to minimum value during this period. Figure 6

The proposed components sizing for the DC-DC Boost converter design involved the voltage ratings and specifications of all the electronics components as indicated in equations 1 to 17

By applying KVL to classical boost converter when ON we have;

(1)

For OFF state classical boost converter, yield

(2)

(3)

(4)

The net voltage across the inductors is equal to zero hence

Equation 4 becomes

(5)

Considering equation 1 and 3 for inductor voltages, Using Volt-second balance law;

Equation 1 reads

(6)

Equation 3 reads for off state

(7)

(8)

Integrating over one complete switching frequency with the use of equation 6 and 7

The LHS is zero because in periodic steady state, the net charge in inductor current is equal to zero.

(9)

The first part of the equation 9 is for on state and the second part for the off state, putting equation 3 into 9.

(10)

= (11)

(12)

The proposed boost converter is the sum of two classical boost converters. The voltage gain of the proposed converter will be twice equation 12.

(13)

(14)

The voltage gain of the proposed converter in terms of duty cycle exist as

(15)

The duty-cycle becomes

(16)

In terms of voltage stress on switch, the voltage stress of the components will be calculated using, equation (17)

(17)

The simulation analyses of the new converter are presented Figure 2, Figure 3, Figure 4, Figure 5. The experiment was done to validate the simulations at such that the corresponding experimental parameters can be evaluated from the theoretical equations. The lists of the parameters used which include their respected values of the proposed converter are analyzed and shortlisted in details as in Table 1

The output and input voltage were recorded, average voltage was evaluated. The input and output voltages across the components were simulated and their graphs were also shown in the Figure 2a, Figure 2b, Figure 2c, Figure 2d.

Figure 6: presents a graph of the inter relationship between the useful solar power input and Solar PV power output under no-load conditions. When the useful solar power input has the maximum value of 307.984W the solar PV module generated 45.5249W at 12:00 PM. However, the solar PV module power output has reduced to a lower value of 0W at 7:00PM at the same time the useful solar power input was 1.388W. This indicated that the solar PV module power output depends really on the useful solar power input.

Figure 7: presents a graph of the correlation between the useful solar power input and Solar PV power output under load conditions. When the useful solar power input has the maximum value of 314.348W the solar PV module generated 45.6896W at 12:00 PM. However, the solar PV module power output has reduced to a lower value of 0W at 7:00PM at the same time the useful solar power input was 2.4W. This indicated that the solar PV module power output depends dully on the useful solar power input and followed the same trend under load condition.

Figure 8 presents three-axis graph of inter relationship between the DC-DC converter output and PV Module output voltages against use solar power input under no-load. It has being observed that at maximum value useful solar power input of 307.984W, the PV module and the DC-DC converter outputs voltages have increases to values of 18.89 V and 99.81 V on no load condition respectively at 12:00 pm. This indicated that the voltage outputs from the PV Module and the DC-DC converter dully depends on solar useful power input.

Figure 9 present three-axis graph of inter relationship between the DC-DC converter output and PV Module output voltages against use solar power input under load condition. It has being observed that at maximum value useful solar power input of 314.348W, the PV module and the DC-DC converter outputs voltages have increases to values of 18.88 V and 99.83 V on load condition respectively at 12:00 pm. This indicated that the voltage outputs from the PV Module and the DC-DC converter dully depends on solar useful power input.